דרושים Lead ASIC/FPGA Verification Engineer בתל אביב
נכון לתאריך
24/11/2025
תל אביב
RAD
About the Role
Lead verification for advanced ASIC/FPGA designs in a top-tier R&D team developing high-performance network interface solutions and customer-focused hardware.
Key Responsibilities
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Drive verification of complex, high-speed ASIC/FPGA designs
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Define and implement advanced verification methodologies
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Collaborate with architecture, software, and validation teams
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Mentor engineers and promote technical excellence
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Work with technologies like high-speed interfaces, network processors, and SoCs
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Mandatory:
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B.Sc. in Computer Science or Electrical Engineering
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7+ years of hands-on verification experience
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Proven end-to-end ASIC flow experience (design to tapeout)
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Strong teamwork and communication skills
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Advantage:
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Leadership or technical management experience
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Ability to guide teams toward successful delivery
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Bonus Skills:
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Python/Bash scripting
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SoC integration
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Formal verification
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Palladium, GLS
Location: Tel Aviv office or our Be’er Sheva office, which is located next to the train station
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